Learners should have studied the following:
Von Neumann architecture:
a.  MAR (Memory Address Register)    
b.  MDR (Memory Data Register)          
c.  Program Counter       
d.  Accumulator

Choose from the following to help you learn:


CAMBRIDGE Computer Science: 
Page 168 Section "Registers" 
Page 172 From "An example of the fetch-decode-execute cycle in operation" which continues on to page 172.
ROBSON & HEATHCOTE Computer Science (9-1):
Page 2 Section "Von Neumann Architecture" which continues onto Page 4.
SUSAN ROBSON GCSE Computing(3rd edition): n/a
SUSAN ROBSON GCSE Computing(2012): n/a 

AXSIED GCSE Computer Science (3rd edition)
Page 5 - R3. The CPU. Paragraphs 1 & 3.
Page 7 - R4. The CPU 2. Paragraphs 1, diagram and 'Registers' table.
ROUSE & O'BYRNE GCSE(9-1) Computer Science:
Page 9. Section on Key Terms & Registers which continues onto Page 10.

Web Sites

BBC Bitesize: Page 3
Cambridge MOOC:  Page 8 
Wikipedia: von Neumann architectureMemory Address Register (MAR)Memory Data Register (MDR)Program Counter and  Accumulator
Simple Wikipedia: von Neumann architecture
Cambridge Digital: 7_Activity1, 7_Activity2 & 8_Activity1
Techopedia: von Neumann architecture
Teach-ICT: THEORY 1 to 6

CSNewbs: See 'Computer Architecture' and 'Important Registers'


CraignDave: Watch from 2:02 to 9:33

MrMDKnight: Watch from 0:00 to 6:50

In One Lesson: Watch from 0:00 to 1:30

KarBytes: Watch from 0:00 to 1:10

Last modified: Tuesday, 22 September 2020, 2:15 PM